# dmesg|grep mmc1
[    1.410288] mmc1: CQHCI version 5.10
[    1.920540] mmc1: CQHCI version 5.10
[    1.962133] mmc1: SDHCI controller on 30b50000.mmc [30b50000.mmc] using ADMA
[    2.147660] mmc1: host does not support reading read-only switch, assuming write-enable
[    2.229512] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[    2.236782] mmcblk1: mmc1:aaaa SC16G 14.8 GiB

# cat /sys/kernel/debug/mmc1/ios
clock:          50000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    6 (sd uhs SDR104)
signal voltage: 1 (1.80 V)
driver type:    0 (driver type B)


# dmesg|grep mmc1
[    1.410572] mmc1: CQHCI version 5.10
[    1.912668] mmc1: CQHCI version 5.10
[    1.954237] mmc1: SDHCI controller on 30b50000.mmc [30b50000.mmc] using ADMA
[    2.117284] mmc1: host does not support reading read-only switch, assuming write-enable
[    2.170913] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[    2.193350] mmcblk1: mmc1:aaaa SC16G 14.8 GiB

# cat /sys/kernel/debug/mmc1/ios
clock:          25000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    6 (sd uhs SDR104)
signal voltage: 1 (1.80 V)
driver type:    0 (driver type B)