Paste #m2H -- näytä pelkkänä tekstinä -- uusi tämän pohjalta
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 | // GPIO configuration setAltFunct(&PWM_CH1_PORT, PWM_CH1, GPIO_AFR_AF6_gc); setAltFunct(&PWM_CH2_PORT, PWM_CH2, GPIO_AFR_AF6_gc); setAltFunct(&PWM_CH1N_PORT, PWM_CH1N, GPIO_AFR_AF6_gc); setAltFunct(&PWM_CH2N_PORT, PWM_CH2N, GPIO_AFR_AF6_gc); setPinOutType(&PWM_CH1_PORT, PWM_CH1, GPIO_OTYPER_PP_gc); setPinOutType(&PWM_CH2_PORT, PWM_CH2, GPIO_OTYPER_PP_gc); setPinOutType(&PWM_CH1N_PORT, PWM_CH1N, GPIO_OTYPER_PP_gc); setPinOutType(&PWM_CH2N_PORT, PWM_CH2N, GPIO_OTYPER_PP_gc); setPinOutSpeed(&PWM_CH1_PORT, PWM_CH1, GPIO_OSPEEDR_LOW_gc); setPinOutSpeed(&PWM_CH2_PORT, PWM_CH2, GPIO_OSPEEDR_LOW_gc); setPinOutSpeed(&PWM_CH1N_PORT, PWM_CH1N, GPIO_OSPEEDR_LOW_gc); setPinOutSpeed(&PWM_CH2N_PORT, PWM_CH2N, GPIO_OSPEEDR_LOW_gc); setPinPull(&PWM_CH1_PORT, PWM_CH1, GPIO_PUPDR_NONE_gc); setPinPull(&PWM_CH2_PORT, PWM_CH2, GPIO_PUPDR_NONE_gc); setPinPull(&PWM_CH1N_PORT, PWM_CH1N, GPIO_PUPDR_NONE_gc); setPinPull(&PWM_CH2N_PORT, PWM_CH2N, GPIO_PUPDR_NONE_gc); setPinMode(&PWM_CH1_PORT, PWM_CH1, GPIO_MODER_OUT_gc); setPinMode(&PWM_CH2_PORT, PWM_CH2, GPIO_MODER_OUT_gc); setPinMode(&PWM_CH1N_PORT, PWM_CH1N, GPIO_MODER_OUT_gc); setPinMode(&PWM_CH2N_PORT, PWM_CH2N, GPIO_MODER_OUT_gc); // Timer configuration SET_REG_MASK(tim->CCMR1, AC_TIM_CCMR1_CC1S_bm, AC_TIM_CCMR1_CC1S_OUT_gc); SET_REG_MASK(tim->CCMR1, AC_TIM_CCMR1_CC2S_bm, AC_TIM_CCMR1_CC2S_OUT_gc); SET_REG_MASK(tim->CCMR1, AC_TIM_CCMR1_OC1M_bm, AC_TIM_CCMR1_OC1M_PWMM1_gc); SET_REG_MASK(tim->CCMR1, AC_TIM_CCMR1_OC2M_bm, AC_TIM_CCMR1_OC2M_PWMM1_gc); SET_REG_MASK(tim->ARR, AC_TIM_ARR_ARR_bm, 0x0FFF); SET_REG_MASK(tim->CCR1, AC_TIM_CCR1_CCR1_bm, 0xF0); SET_REG_MASK(tim->CCR2, AC_TIM_CCR2_CCR2_bm, 0xFF); SET_REG_MASK(tim->CCMR1, AC_TIM_CCMR1_OC1PE_bm, AC_TIM_CCMR1_OC1PE_EN_gc); SET_REG_MASK(tim->CCMR1, AC_TIM_CCMR1_OC2PE_bm, AC_TIM_CCMR1_OC2PE_EN_gc); SET_REG_MASK(tim->CR1, AC_TIM_CR1_ARPE_bm, AC_TIM_CR1_ARPE_BUF_gc); SET_REG_MASK(tim->CR1, AC_TIM_CR1_CMS_bm, AC_TIM_CR1_CMS_CENTER1_gc); SET_REG_MASK(tim->CCER, AC_TIM_CCER_CC1E_bm, AC_TIM_CCER_CC1E_EN_gc); SET_REG_MASK(tim->CCER, AC_TIM_CCER_CC2E_bm, AC_TIM_CCER_CC2E_EN_gc); SET_REG_MASK(tim->CCER, AC_TIM_CCER_CC1NE_bm, AC_TIM_CCER_CC1NE_EN_gc); SET_REG_MASK(tim->CCER, AC_TIM_CCER_CC2NE_bm, AC_TIM_CCER_CC2NE_EN_gc); // Not mentioned in appnote, mentioned in datasheet SET_REG_MASK(tim->EGR, AC_TIM_EGR_UG_bm, AC_TIM_EGR_UG_REINIT_gc); SET_REG_MASK(tim->CR1, AC_TIM_CR1_CEN_bm, AC_TIM_CR1_CEN_EN_gc); // Not mentioned in appnote SET_REG_MASK(tim->BDTR, AC_TIM_BDTR_AOE_bm, AC_TIM_BDTR_AOE_EN_gc); |